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Packaging Options


Packaging And Assembly(third party)



[01] Introduction 
[02] Die Size 
[03] Bonding Pad Layout and Placement 
[04] Plastic Packages 
[05] Design Orientation 
[06] Unpackaged Parts 
[07] Flip Chip
[08] Lids (Taping or Sealing) 
[09] Customer Supplied Packages 
[10] Downbonds 
[11] Packaging Quality Control 
[12] Bonding Diagrams 
[13] Late Packaging Updates 
[14] Bond Wire Electrical Parameters 
[15] ESD

Packages Available From MOSIS For Designs Fabricated Thru MOSIS

CERAMIC PACKAGESOPEN CAVITY PLASTIC (OCP) PACKAGESFULLY ENCAPSULATED PLASTIC PACKAGESPRICES

1. Introduction

In order for an integrated circuit to be useful, it must have physical connections to the outside world. Designers must consider how their part will be packaged before they submit a request for fabrication. MOSIS cannot place a project on a run without knowing how it will be packaged (even if not packaged by MOSIS).

Designers may select from a list of standard packages provided by MOSIS, or they may choose to supply their own packages. Users may request packaged parts, unpackaged parts (loose die) or any mix of both. MOSIS can also provide access to flip-chip and other advanced packaging technologies.

After wafers are fabricated by the foundry and tested by MOSIS, selected wafers are sent to a packager for dicing and assembly. Chips to be packaged are wire-bonded according to a bonding diagram generated by MOSIS or provided by the designer.

Packaging options available through MOSIS for MEP designs are listed in Section 17 of the Educational Program FAQ:

Educational Program FAQ.

Several smaller circuits can be put together in one project. MOSIS does not currently coordinate the singulation of individual circuits within one design submission. Possible sources for dicing and assembly are listed under Third Party Services. Contact the assembly vendor to confirm their sawstreet requirements and die thickness.

2. Die Size

A chip or die is the actual piece of silicon containing a project. In addition to the project, the die contains MOSIS overhead and residual scribe lanes.

Most MOSIS chips are packaged in ceramic or plastic packages, although other options are available. The chip must fit within the cavity of the package and meet normal wire bonding requirements. Considerations include the following:

  • Project size
  • Buffer and Overhead
  • Bare Silicon
  • Package Cavity
  • Die edge to package cavity spacing

A project's size is defined to be the size of the minimum bounding box (MBB) containing the design.

To the project's MBB, MOSIS adds buffer to three sides, and buffer and overhead to the top. The overhead contains critical dimension and alignment figures, as well as a 6-character MOSIS fabrication ID. For a design on a dedicated run, MOSIS can often add buffer to all four sides and not include the overhead at the top.

Designs submitted to IBM runs can also eliminate the 30 µm overhead at the top by allowing MOSIS to make use of LOGOBND region for internal die identification. Please see MOSIS Die ID Implementation for details.

In the example below, MOSIS adds a 12 micrometer buffer to three sides, and 42 micrometers total of buffer and overhead to the top.

The width of the scribes will also affect the size of the die. The saw does not cut to both edges of the scribe, but between the two edges so there will be some remaining trim. Placement within the reticle will also affect size as the scribe lanes between reticles are larger than scribe lanes interior to the reticle.

Example

NOTE: The size of the buffer and overhead varies from one process to another, and is not drawn to scale.

This allows for necessary project-edge to scribe-lane spacing. Though the buffer may be as little as 12 micrometers, it can be several hundred micrometers for reticle-based runs. As a rule of thumb, the buffer, overhead, and bare silicon will not add so much (beyond the minimum) that it forces a project into a larger package. For example, given the project size, minimum overhead, and cavity spacing, if a design fits a 40-pin DIP, the additional bare silicon will not force the project into a larger package.

MOSIS stocks packages of varying size with respect to pin count and cavity size.Specific information on any package inventoried by MOSIS is available.

Packagers require a minimum amount of spacing between the die edge and the package cavity edge. The minimum die edge to cavity edge spacing is:

 Die Edge to Cavity EdgeOverall
Without downbond10 Mils (254 micrometers)Die size + 20 Mils
With downbond20 Mils (508 micrometers)Die size + 40 Mils

MOSIS packaging vendors may be able to accommodate tighter spacing. Please send your request thorugh the online support system for evaluation of your requirement.

Once the die size and package requirements have been determined, the pad-to-pin assignments must be considered.

There are three choices:

  1. You can order unpackaged parts:

    WARNING: Final cut die size is always greater than layout size.

    Even when your parts will not be packaged by MOSIS, you should inform us of your packaging plans so that we can consider your requirements when determining the final cut die size.

    MOSIS now offers the Max Die Size Update Form to allow you to provide maximum cut die size constraints to be considered in the reticle planning process. Please login to MOSIS Project Management using your design number and password.

    Please do not be unnecessarily restrictive. Over-sized or under-sized die may inhibit our ability to include your project on the intended fabrication run.

    Although the above is preferred, an alternative method to specify a die size constraint for unpackaged parts is to enter a "0" (zero) for Quantity-Packaged and provide the name of a Package Available Through MOSIS. The package specified should have the same cavity size as the actual package to be used for assembly.

  2. You can allow MOSIS to assign the pad-to-pin assignments;

    By default MOSIS will attempt to generate a best effort bonding diagram. If MOSIS software is unable to do this automatically MOSIS will ask you to provide the bonding diagram.

  3. You can dictate the pad-to-pin assignments.

    See Section 12 Bonding Diagrams.

3. Bonding Pad Layout and Placement

General

MOSIS assembly vendors can bond prototype quantities of parts designed using all pad design rules referenced below. Customers coordinating their own assembly should contact their assembly vendor to confirm bond-ability based on their specific pad layout.

Minimum recommendations for pad layout vary among fabrication and assembly vendors. The following minimum pad openings and pitch dimensions should create parts easily bondable by any packaging vendor. Designers can base their minimum pad opening and pitch dimensions on the capabilities of the assembly vendor that will be bonding your parts.

The MOSIS general rule for minimum pad layout for wire bonding is:

  • 90 µm x 90 µm (3.5 mils x 3.5 mils) glass cut box over a 100 µm x 100 µm (3.9 mils x 3.9 mils) top metal box (bonding metal) with a 150 µm x 150 µm (5.9 mils x 5.9 mils) pitch.

    Additionally most assembly vendors should be able to bond pads with 60 µm x 60 µm pad openings and 90 µm pitch. MOSIS assembly vendors can easily bond pads with these dimensions, subject to bonding diagram approval.

  • Pads should be centered at the designated pad location.

  • If vendor design rules require a single via is used under the bonding metal, then it should be a box corresponding to the glass cut, also centered.

  • For Agilent sub-micron technologies, a ring of minimum sized vias should be used to connect to underlying metal. The vias should not be under the glass cuts; they should be close to the edge. In either case, an array of minimum vias across the entire pad will cause bonding yield problems and should not be used for this technology.

Please note that pad placement directly affects your yield. Packaged parts that violate the following suggestions are likely to have shorts or other bonding failures:

  1. The number of pads on a side must not exceed the number of bonding fingers along the cavity edge of a package by more than two. Bonding wires should not be at an angle greater than 45 degrees to the chip's axis. The best rule of thumb is to distribute the pads evenly on all four sides.

  2. Bonding pads should be placed along the edges of the project using the appropriate (pitch) center-to-center spacing. Refer to the appropriate table above for the recommended minimum.

  3. Bonding wires must not cross over any active circuitry or other pads.

One way to increase the number of bonding pads on a given design size is to have double rows. This type of bonding may be more expensive, so designers should consult with MOSIS about pricing. Follow these guidelines for packaging parts with two levels of bonding pads:

  1. The bond fingers of the package to be used line up with the pads of the chip.

  2. A bonding diagram is provided by the designer that is a true representation of the die in the package because it is drawn to scale.

  3. The lines on the diagram representing the bonding wires, drawn from bonding pads on the die to the center of the package bonding fingers, are the same width as the bonding pads (approximately 100 micrometers or 4 mils). The lines (wires) drawn should not touch one another.

  4. Shifting the die 250 micrometers in any direction should not cause any lines to touch.

  5. No reverse bonding is allowed. Wires should not exceed 4000 micrometers (~150 mils) in length, and bonding wires from the inner layer of bond pads should not be bonded to the package cavity.

Pad Count (MOSIS Software Estimate)

MOSIS software currently uses the following criteria to count bonding pads.

MINIMUM_PAD_SIZE (passivation opening) = 35 µm x 35 µm

MAXIMUM_PAD_SIZE (passivation opening) = 400 µm x 400 µm

This pad count information is provided for your information only and does not affect fabrication of any pads. All pads (bond, probe or other) will be fabricated from your layout as submitted.

Fabrication Vendor

Rules and geometry vary among vendors and processes. Refer to the specific vendor documents.

MOSIS SCMOS

MOSIS scalable (SCMOS) design rules

Pad geometry in MOSIS scalable (SCMOS) design rules (some processes)

4. Plastic Packages

If you are interested in plastic packages, send a message through the online support system, specifying the package parameters (package type, lead count, body size, and pad size of interest).

5. Design Orientation

By default, MOSIS will orient your die in the package cavity with the orientation of your layout as submitted for fabrication.

To specify rotation of your die in the package cavity, update the SPECIAL HANDLING parameter with the following information.

ROTATE-DIE-CLOCKWISE-IN-PACKAGE-CAVITY: (90, 180 or 270) DEGREES

You must also specify rotation of your die in the package on your customer supplied bonding diagram. Draw an "arrow" figure on your bonding diagram pointing the top of your die as submitted for fabrication in relation to the top of the package cavity. See Section 12 Bonding Diagrams for example.

If the package specified has a rectangular cavity, and the design only fits the package cavity when rotated, MOSIS will rotate your die counterclockwise 90 degrees. To determine if your design has been rotated, look at the bonding diagram supplied with your parts. If the number in the center of the chip is lying on its side, your project has been rotated.

6. Unpackaged Parts

Users may request packaged parts, unpackaged parts (loose dies) or any mix of both.

To request all parts unpackaged, use Quantity-Unpackaged: ALL in your project submission.

To request that some parts be packaged and some not, specify the quantity for either Quantity-Unpackaged or Quantity-Packaged. MOSIS will calculate the quantity of the other from your explicit or implicit Quantity-Ordered.

To constrain the size of your die to fit in a package assembled by someone other than MOSIS, enter a "0" (zero) for Quantity-Packaged and provide the name of a Package Available Through MOSIS.

Bare dies are shipped in bare die trays that provide industry standard ESD protection. See also die size issues.

7. Flip Chip

Flip chip bumping is available through MOSIS. Since bumping requirements vary, please contact the MOSIS packaging manager through the online support system for details.

8. Lids (Taping or Sealing)

By default, all lids are taped on the packages to allow easy removal. If semi-epoxy, full-epoxy or hermetically sealed lids are needed, a SPECIAL HANDLING request must be submitted to MOSIS during project submission. Some packages do not allow sufficient clearance to attach lids with tape; those lids are attached with semi-epoxy.

9. Customer Supplied Packages

Users may supply packages to MOSIS, as long as the following items are received two business-days in advance of the run-closing date:

  • Package drawings
  • Bonding diagram drawn to scale
  • Packages with the appropriate pin count and cavity size (Please provide 3 additional packages for bonding setup)
  • Lids and lid assembly instructions

These items must be labeled with Design Number, Design Name, and contact e-mail, phone, and fax information.

To specify a customer supplied package update the SPECIAL HANDLING parameter with the following:

PACKAGE-MANUFACTURER: KYOCERA 
PACKAGE-PART-NUMBER: KD-12345 
PACKAGE-TYPE: DIP 
PACKAGE-LEAD-COUNT: 16 
PACKAGE-CAVITY-X-DIMENSION: 200 mils 
PACKAGE-CAVITY-Y-DIMENSION: 200 mils 

Possible sources for Ceramic Packages for IC Assembly are listed under Third Party Services.

10. Downbonds

A downbond (sometimes called a substrate connection), is a wire from a package bonding finger to the package cavity. The downbond is intended to make an electrical connection from the package cavity to the bottom of the chip. This bonding finger may also be connected (wired) to one of the chip's pads; if it is, then that pad must be used appropriately (as a GND pad for N_well CMOS, for example). The default pin is #1 for all packages when a downbond is requested.

MOSIS does not put in downbonds unless they are requested. A minimum of 635 micrometers (25 mils) die edge to cavity edge clearance is required.

To request a downbond:

DOWNBOND-TO-SUBSTRATE-PACKAGE-PIN-NUMBER(S): 1, 91

11. Packaging Quality Control

MOSIS determines the bonding diagrams for packaging based upon chip size and pad count, taking into account any special requests.

MOSIS requires that its packaging vendors meet industry visual inspection criteria, including checks for metalization defects, scribing and chip defects, bond and wire inspection, and checks for foreign material.

Each part to be packaged, and all loose die ordered by MOSIS customers must be inspected and must meet the following specifications from MIL STD 883, Method 2010.10, Section 5.1.

Metalization DefectsSections 3.1.1.1, 3.1.1.2 and 3.1.1.6
Scribing and Die DefectsSection 3.1.3
Bond InspectionSections 3.2.1.2, 3.2.1.4
Wire InspectionSection 3.2.2
Foreign MaterialSection 3.2.5
Die MountingSection 3.2.3.1

All bonded parts must have a wire bond pull strength of at least 3 grams as specified in MIL STD 883D, Method 2011.7.

12. Bonding Diagrams

General Information on Bonding Diagrams

MOSIS only accepts bonding diagrams that have been prepared using the final blank bonding diagram templates that are made available after the fabrication run closing process is complete. The final blank bonding diagram template includes the fabrication id and the expected cut die size. The preliminary blank bonding diagrams are for your information only and should not be used to prepare the final bonding diagrams to be sent to MOSIS. The final blank bonding diagram templates will be available after the fabrication run process is complete and can be downloaded from the Project Management Center

MOSIS Supplied

MOSIS can automatically generate bonding diagrams for MOSIS StandardCeramic Packages and MOSIS Standard Open Cavity Plastic Packages.

To request MOSIS-generated bonding diagrams set the BONDING DIAGRAM SUPPLIER parameter to MOSIS when submitting your design.

If MOSIS is unable to automatically generate the bonding diagram, the customer must provide one. See Customer-Supplied Bonding Diagrams.

Note: Customer-supplied bonding diagrams are required for all I2A Technologies (formerly IPAC) plastic packaging.

Preliminary (before run-closing date) and final (after run-closing date) MOSIS-generated blank bonding diagrams are available for download at: Project Management Center

NOTE: Design layout is required and design must be in the fabrication queue before MOSIS-generated blank bonding are made available.

Customer Supplied

Customers that prefer to specify pad-to-pin assignments can do so by providing MOSIS with a customer-supplied bonding diagram.

To request the customer-supplied bonding diagram option, set the BONDING DIAGRAM SUPPLIER parameter to CUSTOMER when submitting your design.

Preliminary customer-supplied bonding diagrams are provided for customer internal use and review only and are not to be sent to MOSIS.

Final customer-supplied bonding diagrams are due within one week of notification that final blank bonding has been posted. Notification that the final blank bonding diagrams are available for creating final customer-supplied bonding diagrams will be sent after the fabrication run closing is complete.

Preliminary (before run-closing date) and final (after run-closing date) blank bonding diagram templates to use for customer-supplied bonding diagrams are available for download at the Project Management Center

General

A bonding diagram can be associated with a project only after the design is in the fabrication queue. The procedure to check and log a bonding diagram is done by hand, so there can be a delay in logging a diagram of several business days after it is received at MOSIS.

To upload your bonding diagram, login to Project Management and select "Upload Bonding Diagrams"

  • MOSIS accepts diagrams in only .pdf or .dwg formats.

    Bonding diagrams for plastic and ceramic packages with greater than 200 leads and/or multiple bond tiers must be supplied in .dwg or .dxf format. Additionally, each bond tier must be drawn on a separate bonding diagram for clearer reference during wire bond set-up/buy-off.

  • Confirm orientation of die in the package cavity. MOSIS default orientation of the die in the package cavity is the same as the layout was submitted.

  • Sample bonding diagrams in .pdf format:

    Please be sure to draw your project to scale with respect to the package cavity.

    Standard packaging charges include one bonding diagram per design. Each additional bonding diagram costs an incremental $100. This is in addition to any other packaging charge.

    13. Late Packaging Updates

    Customer packaging requirements are carefully considered when determining optimal reticle placement/packing of customers layout. Late packaging updates can invalidate optimal placement. Processing late packaging updates can require the complete rework of complicated vendor ordering instructions. As a result of these considerations MOSIS finds it necessary to impose a minimum $250 charge for all late packaging changes. This fee is in addition to the standard packaging charges, and additional charges beyond the $250 minimum may be necessary if additional wafers are required in order to satisfy the late packaging update.

    14. Bond Wire Electrical Parameters

    MOSIS packaging vendors use 1 mil gold wire by default. Other bond wire diameters (smaller 0.8 mil or larger 1.2 or 1.3 mil) may be used in special cases. See Electrical Package Characterization. Under "Additional Information" select Plastic Packages' Electrical Performance: Reduced Bond Wire Diameter (PDF).

    LengthWire LengthBond Wire Diameter
    0.8 mil1.0 mil1.2 mil1.3 mil
    Resistance (Ohm)5 mm0.3830.2570.1980.180
    2 mm0.1540.1030.0790.072

    Inductance (nH)5 mm6.1035.8695.6685.576
    2 mm2.0891.9961.9151.879

    Capacitance (pF)5 mm0.2020.2420.2790.299
    2 mm0.1040.1220.1400.149

    Mutual Inductance (nH)5 mm3.3203.3183.3143.311
    2 mm0.97980.97870.97700.9758

    Mutual capacitance (pF)5 mm-0.0374-0.0488-0.0602-0.0698
    2 mm-0.0204-0.0261-0.0327-0.0364

    15. ESD

    Designers and end users must enforce appropriate protective measures against static discharge damage. ESD protection should be employed in the design whenever possible, and parts should be handled only by trained operators in a static-controlled environment.

    MOSIS handles wafers and singulated and packaged parts in a static-controlled environment with regulated humidity and conductive or dissipative flooring, work surfaces, carriers, and tools. Personnel wear conductive outer garments and gloves and a conductive wrist strap when handling any semiconductor product material. Parts are shipped in static-dissipative, protective packaging.