TSMC Design Kits
To obtain any of these items you must have an account with MOSIS and follow the instructions on the TSMC Design Rules, Process Specifications, SPICE Parametersand Cell Library page.
Process | Design Kit | Simulation | DRC, LVS, Extraction | Libraries | Other |
TSMC iPDK | Spectre, HSpice, Eldo | Calibre:
DRC/LVS/xRC | TSMC, ARM, Synopsys |
| |
Cadence
IC 5.1.41 and OA 6.1, | Spectre, HSpice, Eldo | Assura:
LVS/RCX | TSMC, ARM | Laker, TSMC iPDK | |
Cadence
IC 5.1.41 and OA 6.1, | Spectre, HSpice, Eldo | Assura:
LVS/RCX | TSMC, ARM | Laker, TSMC iPDK | |
Cadence
IC 5.1.41 and OA 6.1, | Spectre, HSpice, Eldo | Assura:
LVS/RCX | TSMC, ARM | Laker | |
Cadence
IC 5.1.41 and OA 6.1, | Spectre, HSpice, Eldo | Assura:
DRC/LVS/RCX | TSMC, ARM | Laker | |
1 The Pyxis Custom IC Design Platform includes LVS, DRC, and Eldo modeling files. Contact Mentor for access.
GlobalFoundries Design Kits
Globalfoundries design kits are available upon approval for MOSIS customers. Send your access request to the MOSIS Customer Support System
GlobalFoundries design kits are available upon approval for MOSIS customers. Send your request for access to the MOSIS Customer Support System.
Process | DRC | LVS | Simulation | PEX |
65 nm | Mentor/Calibre | Mentor/Calibre | HSPICE | Mentor/Xcalibre |
Hercules | Hercules | Cadence/Spectre | Star-RCXT | |
|
| Mentor/ELDO1 | Cadence/QRC2 | |
0.13 µm | Mentor/Calibre | Mentor/Calibre | HSPICE |
|
Hercules | Hercules | Cadence/Spectre | Mentor/Xcalibre | |
Cadence/Diva3 | Cadence/Diva3 | Mentor/ELDO | Star-RC | |
Cadence/Assura3 | Cadence/Assura3 | Agilent/ADS | Star-RCXT | |
|
|
| Cadence/QRC | |
|
|
| Cadence/Assura3 | |
|
|
| Cadence/Diva3 | |
0.35 µm | Mentor/Calibre | Mentor/Calibre | Mentor/ELDO | Mentor/Calibre XRC |
|
| HSPICE | Synopsys/Star-RCXT | |
|
| Cadence/Spectre |
| |
1
Available in 65LPe and 65LP | ||||
IBM Design Kits For CMOS Processes
IBM design kits are available upon approval for MOSIS customers.
To obtain any of these items you must have an account with MOSIS and follow the instructions on the MOSIS web site at the IBM Design Rules, Process Specifications, and SPICE Parameters page.
Technology | Design Kit1 | Simulation | DRC, LVS, Extraction | Libraries | Other |
Cadence | Spectre4 | Assura: DRC/LVS/RCX | IBM Digital I/O | ADS3 | |
n/a | Spectre4 | Calibre: DRC/xRC |
| ADS3 | |
Cadence | Spectre4 | Assura: DRC/LVS/QRC |
| ADS3, 10 | |
Cadence | Spectre4 | Assura: DRC/LVS/QRC |
| ADS3, 9,10 | |
Cadence | Spectre4 | Assura: DRC/LVS/QRC | ESD Toolbox2 |
| |
Cadence | Spectre4 | Assura: DRC/LVS/QRC | ARM, | ADS3 | |
Cadence | Spectre4 | Assura: DRC/LVS/QRC | ARM, | ADS3 | |
Cadence | Spectre4 | Calibre: DRC/LVS/xRC | ESD Toolbox2 | Magma5 | |
Cadence | Spectre4 | Assura: DRC/LVS/QRC | ARM, | Magma5 | |
Cadence | Spectre4 | Calibre: DRC/LVS/xRC | ESD Toolbox2 | Magma5 | |
Cadence | Spectre4 | Assura: LVS/QRC | Virage, | Magma5 | |
Cadence | Spectre4 | Calibre: DRC/LVS/PERC |
| Fire Ice, Magma5 | |
Cadence |
| Calibre: DRC/LVS/PERC |
| Magma5 |
1 Cadence Design Kit usage is reverse compatible. Cadence v5.0.33 works for kits supporting Cadence v5.1.41
2 ESD Toolbox typically contains basic ESD device pcells and small ESD sub-circuits; e.g. anti-parallel diodes, double diodes, Darlington clamp, RC clamp
3 Agilent ADS Dynamic Link support (used together with the IBM Cadence design environment).
4 Must use MMSIM
5 Magma tech files are a separate download and are not included in the Process Design Kit (PDK).
6 Diva is offered, but not supported.
7 This is a Spectre compatible kit. It does not contain unique Eldo models. Please use the Spectre models from the corresponding Cadence design kit.
8 The Pyxis Custom IC Design Platform includes LVS, DRC, and Eldo modeling files. Contact Mentor for access.
9 Agilent "front-to-back" (stand-alone) kit.
10 Agilent "front-end" (stand-alone) kit.
To obtain any of these items you must have an account with MOSIS and follow the instructions on the MOSIS web site at the IBM Design Rules, Process Specifications, and SPICE Parameters page.
Process | Design Kit1 | Simulation | DRC, LVS, Extraction | Libraries | Other |
Cadence | Spectre6 | Assura: DRC/LVS/QRC | IBM Digital,2 | ADS4 | |
Cadence | Spectre6 | Calibre: DRC/LVS/XRC | ESD Toolbox3 | ADS4, 8, 9 | |
Cadence | Spectre6 | Assura: DRC/LVS/QRC | ESD Toolbox3 | ADS4, 8, 9 | |
Cadence | Spectre6 | Assura: DRC/LVS/RCX | ESD Toolbox3 | ADS4ColumbusRF | |
Cadence | Spectre6 | Assura: DRC/LVS/QRC | IBM Digital2, | ADS4ColumbusRF | |
Cadence | Spectre6 | Assura: DRC/LVS/RCX | IBM Digital2, | ADS4 | |
Cadence | Spectre6 | Assura: DRC/LVS/RCX | IBM Digital2, | ADS4 | |
Cadence | Spectre6 | Assura: DRC/LVS/QRC | ESD Toolbox3 | ADS4 | |
Cadence | Spectre6 | Assura: DRC/LVS/QRC | ADS4, 9 |
| |
Cadence | Spectre6 | Assura: DRC/LVS/RCX | EDS Toolbox3 | ADS4ColumbusRF | |
Cadence | Spectre6 | Assura: DRC/LVS/RCX | IBM Digital2, | ADS4ColumbusRF | |
Cadence | Spectre6 | Assura: DRC/LVS/RCX | IBM Digital2, | ADS4ColumbusRF | |
Cadence | Spectre6 | Assura: DRC/LVS/RCX | IBM Digital2, | ADS4ColumbiaRF | |
1 Note: Cadence Design Kit usage is reverse compatible. Cadence v5.0.33 works for kits supporting Cadence v5.1.41
2 Standard cells and/or I/O, with enablement for common platforms.
3 ESD Toolbox typically contains basic ESD device pcells and small ESD sub-circuits; e.g. anti-parallel diodes, double diodes, Darlington clamp, RC clamp
4 Agilent ADS Dynamic Link support (used together with the IBM Cadence design environment).
5 Diva is offered, but not supported
6 Must use MMSIM
7 The Pyxis Custom IC Design Platform includes LVS, DRC, and Eldo modeling files. Contact Mentor for access.
8 Agilent "front-to-back" (stand-alone) kit
9 Agilent "front-end" (stand-alone) kit
ON Semiconductor Design Kits
ON Semiconductor has sub-licensed MOSIS to distribute this information to MOSIS customers who do not have a MyAMIS or MyON account.
To obtain any of these items from MOSIS, you must have an account with MOSIS and follow the instructions on the ON Semiconductor Design Rules, Process Specifications, and SPICE Parameters page.
Process | Simulation | DRC, LVS | PEX | P & R |
Spectre | Calibre | Calibre |
| |
Spectre | Calibre | Calibre |
| |
Spectre | Calibre | Calibre |
| |
Spectre | Calibre | Calibre | Encounter | |
Spectre | Calibre | Calibre | Encounter | |
Spectre | Calibre | Calibre | Encounter |
AMS Design Kits
To obtain any of these items you must have an account with MOSIS and following the instructions on the MOSIS web site at austriamicrosystems Design Rules, Process Specifications, and SPICE Parameters.
An online description of the contents of the HIT-Kits is available from austriamicrosystems.
Technology | Current kit information |
C35B4C3 (0.35 CMOS) | |
C35B4O1 (0.35 CMOS-Opto) | |
C35B4M3 (0.35 CMOS-RF) | |
H35B4D3 (0.35 HV CMOS) | |
S35D4 (0.35 HBT BiCMOS) | |
imec-ePIXfab Design Kits
The imec-ePIXfab SiPhotonics design kit is available upon approval for approved MOSIS customer