XMOD Technologies (Shanghai) is without business partnership with europratice, therefore, no direct access to Europractice MPW resource. However,  most of the europractice resource is overlapped with MOSIS/ICC/IHP  except UMC/XFAB resource.  If customer is with interest on above two foundries' process, please contact XMOD Technologies (shanghai) 


About Europractice

mpw

Europractice was launched by the European Commission (DGIII) in October 1995 to help companies improve their competitive position in world markets by adopting ASIC, Multi-Chip Module (MCM) or Microsystems solutions in the products they manufacture. The program helps to reduce the perceived risks and costs associated with these technologies by offering potential users a range of services, including initial advice and ongoing support, reduced entry costs and a clear route to chip manufacture and product supply.

Europractice can also provide users with the training and CAD software required to design and develop their ASIC, MCM or Microsystems solution.

 

Multi Project Wafer Runs

EUROPRACTICE reduces the cost for ASIC prototyping by combining several designs from different customers onto one wafer. This approach, known as Multi-Project Wafer (MPW), allows the costs to be shared among a number of customers.

 Fabrication of prototypes can thus be as low as 5% to 10% of the cost of a full wafer run. A limited number of tested or untested ASIC prototypes, typically 10-20, are delivered to the customer for evaluation, either as naked dies or as encapsulated devices. Only prototypes from fully qualified wafers are taken to ensure that the chips delivered will function first time right
In order to achieve this, extensive Design Rule and Electrical Rule Checkings are performed on all designs submitted to the Prototyping Service.

EUROPRACTICE is organising about 130 MPW runs per year in various technologies. Most of the participating customers use these runs to get cheap samples for validation of their self-made designs.


Design Kits
Designers need the necessary information (design rules, electrical parameters, cell library, etc.) of the chosen technology before they can start the design phase. All this information is put together by the foundry in the so-called 'design kit'. Customers can have a copy of the design kits by signing a non-disclosure agreement (NDA) with EUROPRACTICE.

Prototype testing 
In most of the cases our customers test their ASIC samples themselves. But for those who do not have this possibility we offer prototype testing. In order to set up a test solution, we need the testvectors from the customer. The testvectors are software generated (simulation) or manually made by the designer.

Prototype encapsulation
 EUROPRACTICE ASIC service offers encapsulated prototypes. It is required to supply the prototypes in a package which is as close as possible to the final ASICs delivered in production. The packaging is done by industrial assembly houses and the range of prototype packages includes DIL, SOIC, CLCC, JLCC, PGA, CQFP, etc. For specific requirements, a solution will be found.



Microsystems & MEMS
From beginning 2008, EUROPRACTICE started offering prototyping service in MEMS for non-commercial use by universities and research centers. Industry proven processes are available. MEMSCAP's PolyMUMPs, METALMUMPs and SOIMUMPs technologies are supported. Design handbooks and design kits available for typical MEMS CAD packages.


Technologies

EUROPRACTICE has signed agreements with several leading foundries and library vendors to offer low cost ASIC prototyping (MPW) and small-medium volume production.

The offering includes IC technologies from the following foundries



AMIS Logo 

ON Semiconductor (formerly AMIS)


The technologies offered include basic 0.7µ, 0.5µ and 0.35µ CMOS logic and mixed and high-voltage 0.7µ, 0.5µ and 0.35µ CMOS. The ON Semi design rules, spice parameters, design manuals and standard cell libraries and design kits are available through EUROPRACTICE after signing the DKLA. For reduced-cost single project engineering runs, MLM (Multi Level Mask) mask set is possible. ON Semi offers for all their technologies the possibility of stitching, allowing to fabricate large image sensor chips (larger than reticle field). 


ams Logo

 

ams


The technologies offered include basic 0.8µ - 0.18µ CMOS logic, mixed and high-voltage 0.8µ and 0.18µ CMOS, high-speed 0.35µ SiGe BiCMOS and 0.35µ CMOS OPTO for image sensors. The ams design rules, spice parameters and design kits are available through EUROPRACTICE after signing the CA and HKLA. 


IHP Logo 

IHP


The technologies offered include high-speed 0.25µ - 0.18µ SiGe:C BiCMOS. The IHP design rules, spice parameters and design manuals are available through EUROPRACTICE after signing the NDA. 

GF logo

 

Globalfoundries


Universities and research institute

Universities and research institutes can only access 55nm, 40nm and 28nmand 40nm CMOS based logic and mixed-signal technologies (see procedures under Foundry Access).

The GLOBALFOUNDRIES design rules, spice parameters and design kits are available through EUROPRACTICE after signing the NDA. Standard cell libraries and design kits for the GLOBALFOUNDRIES technologies are available from various IP providers.

Companies

Companies can access a wide range of GLOBAFOUNDRIES technologies ranging from 180nm down to 28nm.

Companies can get access to these technologies as well as for prototyping as for volume production

TSMC logo

 

TSMC


TSMC is offering a wide range of technologies.

Universities and research institute

Universities and research institutes can only access 0.25u, 0.18u, 0.13u, 90nm, 65nm and 40nm CMOS based logic and mixed-signal/RF technologies (see procedures under Foundry Access).

The TSMC design rules, spice parameters and design kits are available through EUROPRACTICE after signing the NDA. Standard cell libraries and design kits for the TSMC technologies are available from companies like ARM (artisan).

Companies

Companies can access a wide range of TSMC technologies ranging from 0.5u down to 40nm, including all flavors available such as logic, mixed-signal/RF, e-flash, SiGe, CIS (CMOS Imaging Sensor),...

Companies can get access to these technologies as well as for prototyping as for volume production

UMC Logo

 

UMC


The technologies offered include 0.25µ, 0.18µ, 0.13µ, 90nm and 65nm CMOS logic and mixed. In addition also the 0.35µ, 0.25µ and 0.18µ CIS (CMOS Imaging Sensor) technologies are offered for image sensors. The UMC design rules, spice parameters and design kits are available through EUROPRACTICE after signing the NDA. Standard cell libraries and design kits for the UMC technologies are available from Faraday.

XFAB Logo

 

X-FAB


The technologies offered include XH018 (0.18u CMOS high voltage eflash) and XT018 (0.18u CMOS SOI high voltage). The X-FAB design rules, spice parameters and design manuals are available through EUROPRACTICE after signing the NDA.


 

Microsystems & MEMS Technologies :

 

MEMSCAP Logo

MEMSCAP

The Multi-User MEMS Processes, or MUMPs®, is a well-established program that has run consistently since 1992. Over 80 full process runs have been completed and shipped over that time to hundreds of organizations. MEMSCAP offers three unique stand-alone, multi-mask MEMS processes in MUMPs ® : PolyMUMPs, SOIMUMPs, and MetalMUMPs.


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